Two Chips, One Era

8-Bit CPUs — 6502/6510 & Z80

Chapter 1 · Two Chips, One Era

The assembly1 course taught every universal concept a CPU needs — registers, memory, the fetch-decode-execute cycle, the stack — using LC-3, an architecture built specifically so none of history's messiness would get in the way. This course exists to reintroduce that messiness, on purpose. Within a single year, 1975 and 1976, two real chips shipped that shaped an entire generation of home computers — and they solved the exact same problems LC-3 solved cleanly, under real financial and competitive pressure, in two almost opposite ways.

1975–76 — The Microprocessor Boom

In the early 1970s, Intel's 8080 was the microprocessor to build around — powerful for its time, and priced at $179, out of reach for most hobbyists and small companies. Two chips arrived within a year of each other specifically to disrupt that:

MOS Technology 6502 (1975) — designed by Chuck Peddle and a small team who had left Motorola specifically to build something radically cheaper. It launched at $25 — a price cut so aggressive it was demonstrated by literally handing out chips at a trade show. That price point wasn't a side effect of the design; it was the design goal, and cpu8bit1-2 traces exactly how it shaped every architectural decision that followed.
Zilog Z80 (1976) — designed by Federico Faggin, who had previously helped design the very Intel 8080 the Z80 was now competing against. Rather than starting from a clean slate, Faggin built the Z80 as a superset of the 8080 — every existing 8080 program would still run on it, while adding real new capability on top. cpu8bit1-5 covers exactly what that compatibility commitment cost, and what it bought.

Two chips, two completely different founding constraints — one built around a price target, one built around compatibility — and both shipped into the same booming, cash-strapped hobbyist and early home-computer market at almost the same moment.

A Quick Bridge — Baseline Vocabulary from assembly1

This course assumes the concepts assembly1 already built, rather than re-teaching them from zero. If any of the terms below feel unfamiliar, that course is the place to go back to first.

Concept	Fully taught in	How it'll differ here
Fetch-decode-execute cycle	assembly1-2	Same conceptual cycle — but now real cycle counts and timing genuinely matter
Registers	assembly1-4	Small, historically-constrained register sets, organized very differently from LC-3's uniform R0–R7
Addressing modes	assembly1-3	Real addressing modes shaped by cost and compatibility pressure, not clean pedagogical design
The stack	assembly1-7	Real, hardware-managed stacks — the manual PUSH/POP LC-3 required is built into the chip itself

Why compare two chips instead of just picking one

assembly1-1 and assembly1-4 already used this same trick — contrasting LC-3's clean design against the 6502's cost-driven one made both easier to actually understand. Studying the 6502 and Z80 side by side does the same thing at a larger scale: it becomes possible to tell which quirks are genuinely necessary trade-offs, and which are just one company's particular 1975 circumstances, precisely because you're watching two different teams solve the same problems under different pressures.

A First Preview: RISC vs. CISC

The 6502's minimalism — few registers, a small instruction set, most instructions executing in a small, predictable number of cycles — previews a design philosophy that would later be named RISC (Reduced Instruction Set Computing). The Z80's richness — many specialized instructions, more addressing modes, variable-length encodings that pack more capability into fewer lines of assembly — previews what would later be called CISC (Complex Instruction Set Computing).

These terms didn't exist yet

Neither MOS Technology nor Zilog set out to build a "RISC chip" or a "CISC chip" — those terms weren't coined until the Berkeley RISC research project around 1980, years after both chips shipped. Calling the 6502 and Z80 early instances of RISC and CISC is a genuinely useful lens for understanding them today, but it's a modern lens applied in hindsight, not a philosophy either design team was consciously building toward in 1975.

This course names that connection here, deliberately early, and comes back to formalize it properly in cpu8bit1-11 — once both chips have actually been studied in enough depth for the comparison to mean something concrete, rather than just a label.

How This Course Is Structured

To keep the comparison genuinely even-handed, the 6502 and Z80 each get their own uninterrupted three-chapter block, covering identical ground in identical order:

Chapters 2–4 — the 6502: design philosophy, registers & the stack, addressing modes
Chapters 5–7 — the Z80: design philosophy, registers & the stack, addressing modes
Chapter 8 — the same small routine, written and compared in both
Chapter 9 — interrupts, revisiting the minimalism-vs-richness contrast one more time
Chapter 10 — where these chips actually lived: real machines, real culture
Chapter 11 — formalizing the RISC-vs-CISC throughline this chapter only previewed
Chapter 12 — a capstone comparing a larger routine across both chips

Hands-On Exercises

Exercise 1

Using this chapter's own framing, explain why the 6502's $25 price point (against the 8080's $179) is described as "the founding fact of the whole chip" rather than just an interesting historical detail — what does that suggest about how price constraints might have shaped the chip's actual architecture?

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Exercise 2

Federico Faggin helped design the Intel 8080 before designing the Z80 as its compatible superset. Explain how this specific history creates a fundamentally different set of design constraints for the Z80 than the 6502 faced — constraints rooted in compatibility rather than price.

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Exercise 3

Using this chapter's own bridge table, pick one row (fetch-decode-execute, registers, addressing modes, or the stack) and explain specifically what stays conceptually identical from assembly1 versus what will genuinely differ once this course starts covering the 6502 and Z80 in depth.

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Chapter 1 Quick Reference

6502 (MOS Technology, 1975) — built around an aggressive $25 price target vs. the 8080's $179
Z80 (Zilog, 1976, Federico Faggin) — built as a compatible superset of the Intel 8080
This course builds directly on assembly1's own baseline vocabulary — fetch-decode-execute, registers, addressing modes, the stack — rather than re-teaching it
The 6502's minimalism previews RISC; the Z80's richness previews CISC — but neither term existed until ~1980, applied here as a useful modern lens, not a period-accurate one
Chapters 2–4 cover the 6502 in full; Chapters 5–7 cover the Z80 using the identical structure, keeping the comparison even-handed
The RISC-vs-CISC throughline is only previewed here — it's formalized in cpu8bit1-11