Exercise 2: Why (IX+d) Costs Nearly 4x What (zp),Y Costs — Possible Solution ==================================================================== WHAT THE TWO MODES HAVE IN COMMON ------------------------------ Both LD A,(IX+d) and the 6502's LDA (zp),Y are, in spirit, "flexible pointer plus offset" addressing — a base value (a register on the Z80, a stored pointer on the 6502) combined with an additional offset to compute a final effective address, rather than a fixed, unchanging target baked directly into the instruction. WHY THE Z80'S VERSION COSTS SO MUCH MORE ------------------------------ Per this chapter's own explanation, LD A,(IX+d) has to fetch and process considerably more than the 6502's mode does: 1. It needs a PREFIX BYTE first (DD, per cpu8bit1-6's own explanation of how IX-indexed instructions are signaled) — an entire extra byte just to indicate "this is an indexed instruction," which the 6502's zero-page-based addressing never needs. 2. It needs the actual opcode byte. 3. It needs a separate DISPLACEMENT byte (the signed 8-bit d value) read and added to IX at execution time. 4. The CPU still has to perform the actual real address CALCULATION (IX's value plus the displacement) before the memory access can even happen. The 6502's (zp),Y, per cpu8bit1-4, only needs to read a 2-byte pointer already sitting in a fixed, cheap-to-access zero-page location and add Y to it — fewer total bytes to fetch, and the pointer's location is always known in advance (zero page) rather than requiring a whole extra prefix-byte mechanism to signal what kind of addressing is even happening. THE TRADE-OFF THIS REVEALS ------------------------------ The Z80's version is genuinely more flexible — IX can point to any address in the full 64KB space, while the 6502's (zp),Y pointer must specifically live in zero page. But per this chapter's own warn-box, that extra flexibility isn't free: every one of the additional bytes and steps needed to support it (the prefix byte, the separate displacement byte, the address calculation) directly translates into additional cycles. The 6502 gets a cheaper instruction by accepting a real restriction (zero-page-only pointer storage); the Z80 avoids that restriction but pays for it in cycles every single time the instruction runs. WHY THIS WORKS AS AN ANSWER ------------------------------ It breaks down specifically what extra bytes/steps (IX)+d requires that (zp),Y doesn't (prefix byte, displacement byte, calculation), rather than vaguely attributing the cost difference to "the Z80 being more complex," and explicitly frames the result as a real trade-off (flexibility gained, cycles spent) rather than a flaw.