Exercise 2: The Extra Instruction 6502/Z80 Would Need — Possible Solution ==================================================================== WHAT X86-64 DOES IN ONE INSTRUCTION ------------------------------ Per this chapter's own explanation, x86-64's Scale component multiplies the index register by 8 (the correct scale for 8-byte/qword elements) AS PART of computing the memory operand's effective address — for example, MOV RAX, [RBX + RCX*8] reads the correct array element in a single instruction, with the index-to-byte-offset multiplication happening automatically inside the address computation itself. WHAT A 6502 OR Z80 PROGRAM WOULD NEED INSTEAD ------------------------------ Neither cpu8bit1-4's own 6502 addressing modes nor cpu8bit1-7's own Z80 addressing modes include any automatic multiplication step at all — every addressing mode covered in that course only ever ADDS a base and an offset/index together, never multiplies one of them first. To index into an array of 8-byte elements, a 6502 or Z80 program would first need to compute (index * 8) itself, using SEPARATE instructions, before that result could be used as an offset in an addressing mode at all. Since neither chip has a native multiply instruction covered in this arc, that multiplication by 8 would typically be done via three left-shift operations (each shift left doubling the value: x2, x2, x2 = x8) or repeated addition — several extra instructions, executed every single time an array element needs to be accessed, before the actual memory read/write instruction could even run. THE CONCRETE GAP ------------------------------ x86-64: one instruction (the MOV itself, with Scale built in). 6502/Z80: several separate shift or addition instructions to compute the byte offset, THEN a separate addressing instruction to actually read the value — a real, measurable difference in both instruction count and, per cpu8bit1-8's own cycle-counting precedent, real cycles spent on every single array access. WHY THIS WORKS AS AN ANSWER ------------------------------ It identifies specifically that the earlier chips' addressing modes never include a multiply step at all (only addition), names a concrete method (shift-left three times) a 6502/Z80 program would actually need to use instead, and frames the comparison as a real, repeated per-access cost rather than a one-time inconvenience.