Exercise 1: Why an All-Zero BR Is Valid But Useless — Possible Solution ==================================================================== WHY IT'S TECHNICALLY VALID ------------------------------ Per the chapter's own BR bitfield diagram, a BR instruction is simply opcode 0000 followed by three condition bits (n/z/p) and a 9-bit PC-relative offset. Nothing in that encoding forbids all three condition bits from being 0 -- it's a perfectly well-formed 16-bit pattern that the CPU can fetch, decode, and execute without error. WHY IT NEVER ACTUALLY DOES ANYTHING USEFUL ------------------------------ Per the chapter's own explanation of how BR works: "the CPU compares those three bits against the current N/Z/P condition codes; if ANY of the bits set to 1 in the instruction match a condition code that's currently set to 1, the branch is taken." If none of the instruction's three bits are set to 1 in the first place, there is nothing for them to possibly match against -- no combination of N/Z/P condition codes could ever satisfy the branch condition, because the branch condition itself requires at least one 1-bit to match against. As a result, this instruction ALWAYS falls through to the next instruction, no matter what the condition codes currently are. Per the chapter's own mnemonic table, this is exactly the "(no mnemonic) -- never" row: it behaves identically to a no-op, just taking up an instruction slot and a cycle without ever changing the flow of the program. WHY THIS WORKS AS AN ANSWER ------------------------------ It distinguishes clearly between "valid encoding" (nothing in the bit pattern is malformed) and "useful behavior" (the branch condition can never be satisfied), using the chapter's own stated matching rule to show mechanically why zero set bits guarantees the branch is never taken.