Exercise 1: Decoding a Raw ADD Instruction — Possible Solution
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THE BIT PATTERN
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0001 010 011 1 00111

Split according to the chapter's own ADD bitfield diagrams:

  0001    - opcode
  010     - DR (destination register)
  011     - SR1 (first source register)
  1       - mode bit
  00111   - imm5 (since mode bit is 1)

DECODING EACH FIELD
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- Opcode 0001 -> per this chapter's own table, this is ADD.

- Mode bit is 1 -> per the chapter's "ADD, Immediate Mode" diagram,
  bit 5 = 1 means immediate mode (not register mode). This means the
  remaining 5 bits are a signed immediate value, not a second source
  register.

- DR = 010 -> binary 010 = decimal 2 -> destination register is R2.

- SR1 = 011 -> binary 011 = decimal 3 -> source register is R3.

- imm5 = 00111 -> binary 00111 = decimal 7. Since this is a small
  positive 5-bit value (top bit is 0, so no sign-extension changes its
  value), the operand's decimal value is 7.

FULL INSTRUCTION
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This instruction is: ADD R2, R3, #7  (R2 <- R3 + 7)

WHY THIS WORKS AS AN ANSWER
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It splits the 16-bit pattern using the exact field widths from the
chapter's own ADD bitfield diagrams, correctly identifies immediate
mode from the mode bit, converts each binary field to its decimal
meaning, and reconstructs the full, correctly-formatted instruction.