Exercise 2: Why Evaluate Address / Fetch Operands Get Skipped — Possible Solution ==================================================================== WHY ADD R1, R0, R2 SKIPS THEM ------------------------------ ADD in register mode gets both of its operands (R0 and R2) directly from the register file -- it never needs to compute a memory address or read anything from memory at all. There's simply nothing for Evaluate Address to compute, and nothing for Fetch Operands to fetch FROM MEMORY, so both phases have no work to do and are skipped. WHY LD R1, VALUE DOES NOT SKIP THEM ------------------------------ LD's whole job is to load a value FROM MEMORY into a register. Before it can do that, the CPU first has to figure out the actual memory address that the label VALUE refers to -- that's exactly what Evaluate Address computes. Only once that address is known can Fetch Operands actually go read the value sitting at that address into MDR, ready to be stored into R1 during Store Result. THE GENERAL RULE ------------------------------ Whether Evaluate Address and Fetch Operands run depends entirely on whether the instruction needs to touch MEMORY for its operands, not just on how "complicated" the instruction looks. Register-only instructions (like ADD, AND, NOT in register mode) already have their operands sitting in the register file, so both phases are skipped. Any instruction that reads from or writes to memory (like LD, ST, and the other memory-referencing instructions covered in assembly1-3) needs Evaluate Address to compute WHERE in memory to look, and Fetch Operands to actually retrieve the value from there. WHY THIS WORKS AS AN ANSWER ------------------------------ It explains both instructions using the chapter's own trace and its LD contrast, then states the general rule in terms of the actual mechanism (does this instruction need a memory address at all) rather than a surface-level guess like "simple vs. complex instructions."