Exercise 1: Tracing -1 + 1 Through the Full Circuit — Possible Solution
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GIVEN
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A = -1, B = 1, M = 0 (addition mode)

STEP 1: ENCODE THE OPERANDS
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A = -1 in 3-bit two's complement: 111
B = 1 in 3-bit two's complement: 001
B XOR M (M=0, so B is unchanged): 001

STEP 2: TRACE EACH FULL-ADDER STAGE (LSB TO MSB)
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LSB: full_adder(A=1, Bmod=1, cin=0) -> SUM=0, COUT=1
middle: full_adder(A=1, Bmod=0, cin=1) -> SUM=0, COUT=1
sign/MSB: full_adder(A=1, Bmod=0, cin=1) -> SUM=0, COUT=1

STEP 3: ASSEMBLE THE RESULT
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Result bits: 000 -> decimal 0

STEP 4: CHECK OVERFLOW
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Carry into sign stage (from middle stage): 1
Carry out of sign stage: 1
Overflow = 1 XOR 1 = 0 -> no overflow

RESULT
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-1 + 1 = 0, with no overflow flagged - correct on both counts.

WHY THIS WORKS AS AN ANSWER
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Both operands are correctly encoded in two's complement before
tracing (not just their positive magnitudes), each full-adder stage
is computed explicitly in the correct LSB-to-MSB order with the
carry chain shown, and the overflow check is performed using this
chapter's own carry-in/carry-out XOR formula rather than just
inspected for plausibility.